Texas Instruments TMS320C3x User Manual page 536

ASH3||STI
Parallel ASH3 and STI
Example
13-78
ASH3
|| STI
Before Instruction
R0
00 0000 0000
R1
00 0000 FFE8
R5
00 0000 0035
AR2
AR6
IR1
LUF
LV
UF
N
Z
V
C
Data memory
809900h
8098A2h
Note: Cycle Count
See Section 8.5.2, Data Loads and Stores , on page 8-24 for the effects of
operand ordering on the cycle count.
R1,*AR6++(IR1),R0
R5,*AR2
–24
53
80 98A2
80 9900
8C
0
0
0
0
0
0
0
809900h
0AE000000
8098A2h
0
After Instruction
R0
00 FFFF FFAE
R1
00 0000 FFE8
R5
00 0000 0035
AR2
80 98A2
AR6
80 998C
IR1
8C
LUF
0
LV
0
UF
0
N
0
Z
0
V
0
C
0
0AE000000
35
–24
53
53