Xycom XVME-678 Manual page 96

Vmebus pc/at processor module
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Chapter
4 -
Programming
SYSFAIL*
S
CONREG5_1
R
Abort Toggle
S
R
) - - - - - I S
L.-------a
R
CONREG5_2 .. Control Register 5 bit 2
Control Register 5
=
I/O 3Eh
0
0
SYSFAIL
NMI
LATCH
ABORT
NMI
LATCH
BERR
NMI
LATCH
STATUS 1_2
1/0
32h
STATUS1_3
AT-Bus
Interrupt
IR010
Note: This is internally OReeI with the
VMEbus interrupts to create IR010
4-9. BERR, SYSFAIL, and ABORT Switch Mapped on IRQI0
4-24

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