Xycom XVME-678 Manual page 89

XVME-678/688 Manual
July 1994
4.6.1 Control Register 1 (CO NREG 1, Port Address 30H)
This read/write port controls many module functions. All bits of this port are set to zero when the module
is reset. The bits of this register are described below.
DO is set to 0 and is reserved and read-only
D 1 controls the FAIL LED
o
=
FAIL LED is on, XVME-678/688 asserting SYSFAIL if SW1, position 3 is closed (refer
to Section 2.3)
1
=
FAIL LED is on, XVME-678/688 not asserting SYSFAIL
D2 controls the PASS LED
o
=
PASS LED is off
1
=
PASS LED is on
D3 gives the instruction to the VMEbus requester
o
=
release the VMEbus
1
=
acquire and retain ownership of the VMEbus
D4 sets the Auxiliary NMI sources status (VME SYSFAIL *, VME Local BERR *, and ABORT
switch)
o
=
disable
1
=
enable
D5,D6 determine the Real Mode Window access type
EPROM Access
VMEbus Short I/O Access
VMEbus Standard Access
VMEbus lACK Cycle
D6
o
o
1
1
D5
o
1
o
1
D7 sets the Auxiliary Maskable Interrupt status (VME interrupts 1 through 7)
o
disable
1
=
enable
NOTE
AMls must be disabled before toggling bit D7 of this register. Refer to
Section 4.7.1 for instructions on how to disable interrupts.
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