Xycom XVME-678 Manual page 141

Appendix A - VMEbus CONNECTOR/PIN DESCRIPTIONS
The XVME-678/688 PC/AT Processor Module is a double-high VMEbus compatible module. On the rear
edge of the board is a 96-pin bus connector labeled PI. The signals carried by connector PI are the
standard address, data, and control signals required for a PI backplane interface, as defined by the
VMEbus specification. Table A-I identifies and defmes the signals carried by the PI connector.
Table A-I. VMEbus Signal Identification
Signal Connector, Row:
Signal Name and Description
Mnemonic Pin Number
ACFAIL* IB:3 AC FAILURE: Open-collector driven signal which
indicates that the AC input to the power supply is no
longer being provided, or that the required input voltage
levels are not being met.
IACKIN* lA:21 INTERRUPT ACKNOWLEDGE IN: Totem-pole driven
signal. IACKIN* and IACKOUT* signals form a daisy-
chained acknowledge. The IACKIN* signal indicates to
the VME board that an acknowledge cycle is in progress.
IACKOUT* IA:22 INTERRUPT ACKNOWLEDGE OUT: Totem-pole
driven signal. IACKIN* and IACKOUT* signals form a
daisy-chained acknowledge. The IACKOUT* signal
indicates to the next board that
an
acknowledge cycle is
in progress.
AMO-AM5 lA:23
ADDRESS MODIFIER (bits 0-5): Three-state
IB:16,17 driven lines that provide additional information about the
18,19 address bus such as size, cycle type, and/or DTB master
lC:l
identification.
AS* lA:18 ADDRESS STROBE: Three-state driven signal that
indicates a valid address is on the address bus.
AOI-A23 lA:24-30 ADDRESS BUS (bits 1-23): Three-state driven
lC: 15-30 address lines that specify a memory address.
A24-A31 2B:4-11 ADDRESS BUS (bits 24-31): Three-state driven bus
expansion address lines.
A-J