4.10
CMOS RAM
XVME-678/688 Manual
July 1994
The XVME-678/688 has 128 bytes of battery-backed RAM located on the 82C206 chip. The RAM is
accessed by first placing the index value on the data bus. It is recommended that the address 070H be used
to strobe the index. To do this, write to port 70H with the index value. The RAM may then be written
to or read from port 071H.
Index
Function
OOH-3FH
AT configuration
40H-7FH
Xycom configuration
Observe caution when writing the index value to port 070H, because bit 7 is the NMI enable bit. If a 0
is placed in bit 7 the NMI will be enabled; if a 1 is placed in bit 7 the NMI is disabled.
Writing to CMOS RAM involves two steps:
1. Out to port 70H with the CMOS address to which data will be written
2. Out to port 71H with the data to be written
Reading CMOS RAM involves two steps:
1. Out to port 70H with the CMOS address from which data will be read
2. In from port 71H, and the data read is returned in the AL register
Table 4-3 on the next page shows the CMOS RAM address map.
4-31
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