Xycom XVME-678 Manual page 143

Signal
Mnemonic
DTACK*
DOO-D31
GND
IACK*
IRQl *-IRQ7*
LWORD*
(RESERVED)
SERCLK
SERDAT
XVME-678/688 Manual
July 1994
Table A-I. VMEbus Signal Identification
(continued)
Connector, Row:
Signal Name and Description
Pin Number
lA:16
DATA TRANSFER ACKNOWLEDGE: Open-collector
driven signal generated by a DTB slave. The falling edge
of this signal indicates that valid data is available on the
data bus during a read cycle, or that data has been
accepted from the data bus during a write cycle.
lA:I-8 DATA BUS (bits 0-31): Three-state driven, bi-directional
lC: 1-8
data lines that provide a data path between the DTB
2B:IA-21 master and slave.
2B:23-30
lA:9,1l,15,17,19 GROUND
IB:20,23
lC:9
2B:2,12,22,31
lA:20 INTERRUPT ACKNOWLEDGE: Open-collector or
three-state driven signal from any master processing an
interrupt request. It is routed via the backplane to slot 1,
where it is looped-back to become slot 1 IACKIN* to
start the interrupt acknowledge daisy-chain.
IB:24-30 INTERRUPT REQUEST (1-7): Open-collector driven
signals, generated by an interrupter, which carry
prioritized interrupt requests. Level seven is the highest
priority.
lC:13
LONGWORD: Three-state driven signal indicates that
the current transfer is a 32-bit transfer.
2B:3 RESERVED: Signal line reserved for future VMEbus
enhancements. This line must not be used.
IB:21 A reserved signal that will be used as the clock for a
serial communication bus protocol that is still being
finalized.
IB:22 A reserved signal that will be used as the transmission
line for serial communication bus messages.
A-3