Control Register - Xycom XVME-678 Manual

Chapter
4 -
Programming
4.6.7 Control Register 3 (CONREG3, Port Address 3CH)
This register is used to control various features. All bits in this port are set to zero when the module is
reset. Each bit is described below.
DO gives the VMEbus master interface status
o
=
enable
1
=
disable
Dl gives the status of the Program FLASH BIOS (future use)
o
=
disable '
1
=
enable
D2-D7 are reserved, read-only, and set to 0
4.6.8 Control Register 4 (CONREG4, Port Address 3DH)
This register enables the seven VMEbus interrupts which cause IRQIO to interrupt the CPU as individual
entities. Bit 0 of this register implements a new function which is the mapping of the auxiliary NMIs
(ABORT and SYSFAIL) and VME BERR onto IRQlO.
DO determines where the auxiliary interrupt occurs
o
=
Aux NMIs on NMI interrupt
1
=
Aux NMIs on IRQI0
DI-D7 enables/disables its corresponding interrupt level
o
=
disable
1
=
enable
Dl controls VME(IRQl)
D2 controls VME(IRQ2)
D3 controls VME(IRQ3)
D4 controls VME(IRQ4)
D5 controls VME(IRQ5)
D6 controls VME(IRQ6)
D7 controls VME(IRQ7)
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