Xycom XVME-212 Manual
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Xycom XVME-212 Manual

Digital input module
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Summary of Contents for Xycom XVME-212

  • Page 1 (217) 352-9330 | Click HERE Find the Acromag / Xembedded / Xycom XVME-212/1 at our website:...
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  • Page 4: Table Of Contents

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  • Page 7: Introduction

    PC traces to the 12V on-board supply). XVME-212/2 -- The /2 version of the XVME-212 is very similar to the /I version except for the range of allowable input voltage and the absence of an on-board +12V DC power supply.

  • Page 8: Operational Block Diagram

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  • Page 9: Xvme-212 Module Specifications

    (two Test Status bits, and a red and green LED bit) are standard from module to module. A detailed description of Xycom I/O Architecture is presented in Appendix A at the rear of this manual. XVME-212 MODULE SPECIFICATIONS Table l-l.
  • Page 10 XVME-2 12 Manual August, 1989 Table l-l. XVME-2 12 Module Specifications (cont’d) Characteristic Specification Isolation 300 VDC channel-to-channel 300 VDC channel to VMEbus ground Board Dimensions NEXP board size (160mm x 233.4mm) Environmental Specifications Temperature Operating Non-operating Humidity 5 to 95% RH, non-condensing (Extremely low humidity conditions may require special protection against static discharge.)
  • Page 11 Base address jumper-selectable within 64K short I/O address space Occupies 1K consecutive byte locations I(1) to I(7) Interrupter (STAT) with programmable vector Includes Xycom’s standard I/O module interface NEXP Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 12: Installation

    To operate, it must be properly installed in a VMEbus backplane cardcage. The minimum system requirements for operation of the XVME-212 are one of the following (either A or B below): A host processor properly installed on the same backplane.
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  • Page 14: Jumpers/Switches

    XVME-212 Manual August, 1989 2.4 JUMPERS/SWITCHES Prior to installing the XVME-212, it is necessary to choose several jumper/switch selectable options. These options fall into two categories: VMEbus-related options and debounce period jumpers. VMEbus Options Module base address, selected by switches l-6 of the Address Switches (Sl)

  • Page 15: Base Address Selection Switches (Sl-1 To S1-6)

    Base Address Selection Switches (Sl-1 to Sl-6) 2.4.1 The XVME-212 module is designed to be addressed within either the VMEbus Short I/O or Standard Memory Space. Since each I/O module connected to the bus must have its own unique base address, the base addressing scheme for the XVME I/O modules has been designed to be switch or jumper selectable.

  • Page 16: Switch Bank S1 Base Address Switches

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  • Page 18: Address Space Selection

    2.4.3 Supervisory/Non-Privileged Mode Selection The XVME-212 can be configured to respond only to supervisory access, or to both non- privileged and supervisory accesses, by selecting the position of Switch 7 (located in Switch Bank Sl, see Figure 2-2), as shown in Table 2-4 below.

  • Page 19: Interrupt Level Switches (S2)

    The three Interrupt Level Switches select which VMEbus interrupt level is to be used by the module. The XVME-212 can be programmed to generate an interrupt whenever a change of state is detected on any input line, and these switches will determine the level of that interrupt.

  • Page 20: Installation

    So selecting this time will essentially defeat the debounce circuitry for users concerned about speed and not concerned about bounce. INSTALLATION The Xycom VMEbus modules are installed in a standard VMEbus backplane. Figure 2-3 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 21: Vmebus Chassis

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  • Page 22: Installation Procedure 2-1

    XVME-212 Manual August, 1989 Installation Procedure 2.5.1 CAUTION Never attempt to install or remove any boards before turning off the power to the bus, and all related external power supplies. Prior to installing a module, determine and verify all relevant jumper configurations, and all connections to external devices or power supplies.
  • Page 23 CH29+ CH14- CH30- CH14+ CH30+ CH15- CH31- CH15+ CH31+ 12V Return (XVME-212/l) 12V Return (XVME-212/l) Ground (XVME-2 12/2) Ground (XVME-2 12/2) 12V Return (XVME-212/l) 12VReturn(XVME-212/l) Ground (XVME-2 12/2) Ground (XVME-2 12/2) 2-12 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 24: Mechanical Switch/Relay Operation

    2.7.2 XVME-212/2 With the XVME-212/2, the +5V supply of the VME backplane is used with the mechanical switches. Each “+" terminal of the input channels is connected to +5V (with reference to logic ground) while pins 49 and 50 of the JK ports are connected to logic ground. (See Table 2-9.) The external switch should be connected between the “-”...

  • Page 25: Programming

    The base address is selected via the switches described in Section 2.4.1. When located at its base address, the XVME-212 is allotted a 1K block of address space for its own use. This 1K block of address space is termed the I/O Interface Block, and contains all of the module’s programming locations.
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  • Page 27 August, 1989 INTERFACE BLOCK The I/O Interface.Block of the XVME-212 contains the following programming locations (as shown in Figure 3-1) which are defined in greater detail later in the chapter. I.D. information (base+OlH to base+3FH): These locations provide information specifying model number, manufacturer, and revision level.
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  • Page 29: Interface Block

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  • Page 30 1. A bit value of 1 in a Change Register indicates that a change of state has occurred on a specified input channel. VMEbus Interrupt Enable This bit enables VMEbus interrupts from the XVME-212 module: a VMEbus interrupt will be generated automatically whenever the XVME-212 sets bit 2 to 1.
  • Page 31 XVME-212 Manual August, 1989 4-7 . Change Register n Interrupt Enable These bits individually enable the Change Registers to generate VMEbus interrupts whenever any bit in a Change Register is set. Writing a 1 in one of these bits enables interrupts from a specific Change Register, writing 0 disables interrupts from the register.

  • Page 32: Interrupt Acknowledge (Iack) Vector Register

    This write-only register holds the vector to be driven on the VMEbus when a VMEbus interrupt generated by the XVME-212 is acknowledged. 3.7 DATA REGISTERS Four read-only Data Registers hold the state of the XVME-212’s four input ports (see Figure 3-3). Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 33: Change Registers

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  • Page 34: Scanner

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  • Page 35: Restarting The Scanner 3-1

    VMEbus is relieved of the traffic required to constantly poll the module. The level of the VMEbus interrupt generated by the XVME-212 is determined by the setting of Switch bank S2 (see Section 2.4.5). The IACK vector is determined by the contents of the IACK Vector Register at location base+83H (see Section 3.6).
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  • Page 37 XVME-212 Manual August, 1989 3.11 PROGRAMMING CONSIDERATIONS Use the following procedure to ensure that no change bits in a Change Register are zeroed before they are read. The Change Register must be read first, which will stop the scanner. Then the Data Register is read, which will zero the Change Register and restart the scanner.

  • Page 38: Relationship Of Input Channel Signals With

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  • Page 39 Status/Control Register so the VMEbus interrupt currently being generated by the XVME-212 will be negated, and the SYSFAIL* will be asserted on the VMEbus because bit 0 is reset to zero.) The scanner is stopped and the Data and Change Registers are reset to zero.
  • Page 40 The I/O Architecture specifies the logical aspects of bus interfaces, as opposed to the “physical” or electrical aspects as defined in the VMEbus specifications. The module elements which are standardized by the XYCOM I/O Architecture are the following:...
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  • Page 42 XVME-212 Manual August, 1989 Standardized Module I/O Map The block of short I/O addresses (called the I/O Interface Block) allocated to each XVME module is mapped with a standardized format in order to simplify-programming and data access. The locations of frequently used registers and module-specific identification information are uniform.
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  • Page 46 XVME-212 Manual August, 1989 The module status/control register (found at module base address + 8lH) on intelligent XVME I/O modules provides the current status of the module self-test in conjunction with the current status of the front panel LEDs. The status register on intelligent modules is a “Read Only”...
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  • Page 48 (on the XVME-164 MBMM). This design provides the full complement of VMEbus Requester and Interrupter options for master/slave interfacing, as well as all of the advantages provided by the various facets of the XYCOM Standard I/O Architecture (as covered earlier in this appendix).
  • Page 49 CONNECTOR/PIN DESCRIPTION VMEbus The XVME-212 Processor Module is a double-high VMEbus compatible board. There is one 96-pin bus connector on the rear edge of the board labeled Pl (refer to Chapter 2, Figure 2-I for the location). The signals carried by connector PI are the standard address, data, and control signals required for a Pl backplane interface, as defined by the VMEbus specification.
  • Page 50 XVME-212 Manual August, 1989 Table VMEbus Signal Identification (cont’d) B-l. Connector Signal Mnemonic Pin Number Signal Name and Description ADDRESS BUS (bits l-23): Three-state driven address lines A0l-A23 1A:24-30 that specify a memory ‘address. lC:l5-30 ADDRESS BUS (bits 24-31): Three-state driven bus...
  • Page 51 XVME-2 12 Manual August, 1989 Table B-l. VMEbus Signal Identification (cont’d) Connector Signal Signal Name and Description Mnemonic Pin Number lB:12-15 BUS REQUEST (O-3): Open-collector driven signals BR0*-BR3* generated by Requesters. These signals indicate that a master in the daisy-chain requires access to the bus. lA:13 DATA STROBE 0: Three-state driven signal that indicates DS0*...
  • Page 52 XVME-212 Manual August, 1989 Table B-l. VMEbus Signal Identification (cont’d) Connector Signal Pin Number Signal Name and Description Mnemonic INTERRUPT ACKNOWLEDGE: Open-collector or three- IACK* 1 A:20 state driven signal from any master processing an interrupt request. It is routed via the backplane to slot 1, where it is looped-back to become slot 1 IACKIN in order to start the interrupt acknowledge daisy-chain.
  • Page 53 XVME-2 12 Manual August, 1989 Table B-l. VMEbus Signal Identification (cont’d) Connector Signal Mnemonic Pin Number Signal Name and Description SYSFAIL* 1C:lO SYSTEM,FAIL: Open-collector driven signal that indicates that a failure has occurred in the system. It may be generated by any module on the VMEbus. SYSRESET* lC:12 SYSTEM RESET: Open-collector driven signal which, when...
  • Page 54 XVME-212 Manual August, 1989 Table B-l. VMEbus Signal Identification (cont’d) Connector Signal Mnemonic Pin Number Signal Name and Description SYSFAIL* 1C:l0 SYSTEM,FAIL: Open-collector driven signal that indicates that a failure has occurred in the system. It may be generated by any module on the VMEbus.
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