Memory Region Temperature Monitoring - Intel S7000FC4UR Technical Product Specification

BMC Functional Specifications

22.25 Memory Region Temperature Monitoring

Temperature information from the memory region is a vital component of overall system cooling
and acoustics management.
22.25.1 DIMM Temperature Monitoring
The FBDIMMS have an Advanced Memory Buffer (AMB) component on each module. The AMB
chip has the ability to measure and report its own temperature. The DIMM module has been
characterized so that the AMB temperature is an indication of the DRAM temperature.
Due to the large number of DIMMs, the BMC does not maintain an IPMI temperature sensor for
each DIMM slot. Instead, there is an IPMI temperature sensor for each AMB aggregate margin
value calculated by the BMC. These temperature sensors are used for reporting temperature
information, logging SEL entries, and as input to the system fan management. If a DIMM is
present and enabled and the system is powered-on, the BMC periodically accesses the AMB
via the SMBus interface to the MCH (North Bridge) to retrieve the current temperature value as
input to the aggregate margin IPMI sensor value calculations. See section 22.17.1.2 for more
information.
The BIOS provides the DIMM presence information to the BMC using the Set DIMM State
command at each system boot. After each power-on or system reset, the BMC must wait to
scan the AMB temperature for a slot until after the BIOS sends the Set DIMM State command to
set the DIMM state as present and enabled for that slot.
Each AMB aggregate margin temperature sensor is shown as init-in-progress until the system is
powered on and the BMC has successfully scanned the temperatures of all of AMB devices
associated with the aggregate margin sensor. The BMC disables an AMB aggregate margin
sensor if the DIMM state information indicates that no associated DIMMs are present and
enabled.
22.25.2 Memory Riser Board Temperature Monitoring
Each memory riser board has locations for two physical temperature sensors, one at each end
of the board. This section describes the support to be provided by the BMC, which can be
enabled via SDRs if the physical sensor devices are populated.
The BMC implements one IPMI sensor for each memory riser board representing the minimum
of the readings from the two physical sensors on the board. The preliminary thermal
assessment indicates that this sensor is required as an input to standard fan management
regardless of the availability and accuracy of the AMB sensors described above.
The BMC disables a memory riser board's temperature sensors whenever that riser board is not
physically present when the BMC's SDR initialization agent executes.
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Intel order number E18291-001
ESB2 BMC Core TPS
Revision 1.0