Intel S7000FC4UR Technical Product Specification page 63

Intel® Server System S7000FC4UR TPS
The System Host, ADT7490*, supports three possible SMBus addresses, which include the
following:
0x58
0x5A
0x5C
Address 0x5A has been assigned to this device. When the device is powered up with Pin 13
(PWM3/ADDREN) high, the ADT7490* has a default SMBus address of 1011100 or 0x5C. To
change this address, the device is placed in ADDR SELECT mode by strapping Pin 13 low on
power-up.
The logic state of Pin 14 then determines the device's SMBus address. The logic of these pins
is sampled on power-up. The device address is sampled on power-up and latched on the first
valid SMBus transaction. More precisely the device is latched on the low-to-high transition at the
th
beginning of the 8 SCL pulse, when the serial bus address byte matches the selected slave
address. The selected slave address is chosen using the ADDREN pin/ ADDR SELECT pin.
Any attempted changes in the address have no effect after this.
Within a single client device there may exist multiple PECI domains. A PECI domain is a sub-
partition that is served by an independent PECI client but shares the same device address.
The PECI GetTempx commands are used to retrieve temperature from a target PECI address.
GetTemp0 specially refers to PECI domain 0 in processor's with multiple domains. GetTemp1 is
used to read the temperature from the other domain.
PECI temperature data is returned as a negative value representing the number of degrees
centigrade below the thermal control circuit activation temperature of the PECI device.
Additionally, the associated Tcontrol value is also a negative number below the thermal control
circuit activation temperature.
No thermal diode support is included for the processors. Therefore, server management must
now manipulate relative numbers. Other components in the platform continue to provide
absolute temperature readings.
PECI operates at the processor's P_VTT voltage level. All DC electrical specifications, including
hysteresis, thresholds and current requirements are included in the Platform Environment
Control Interface (PECI) Specification and applicable processor EMTS.
3.3.3.1 PECI System Requirements
To implement PECI enabled processors, the systems must perform various functions. These
include, but are not limited to the following:
Detecting the presence of PECI enabled processors
Determining the number of PECI domains per physical package
PECI Fault handling:
Revision 1.0
Main Board Server Management
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