Table 87. Sel Entry Format - System Firmware Progress Sensor Type Examples; Table 88. Sel Entry Format - Event Logging Disabled Sensor Type; Ipmi Sensor Type Events — Event Logging Disabled - Intel S7000FC4UR Technical Product Specification

BIOS Error Handling
Table 87. SEL Entry Format — System Firmware Progress Sensor Type Examples
Error Type
POST Error Code 8190h
19.2.6 IPMI Sensor Type Events — Event Logging Disabled
The BIOS logs SEL entries for the following events according to the format described in the
table below:
Sensor Offset 00h — Correctable Memory Error Logging Disabled
Note: SEL record logging for ALL other Event Logging Disabled Sensor Offsets is the
responsibility of the BMC (i.e. BIOS is not responsible for SEL records indicating SEL Full or
Log Area Reset/Cleared).
See the Intelligent Platform Management Interface Specification, Version 2.0, Table 42-3 for the
following implementation details:
Table 88. SEL Entry Format — Event Logging Disabled Sensor Type
Byte Field
11 Sensor Type
12 Sensor
Number
14 Event Data 1
(ED1)
15 Event Data 2
(ED2)
232
IPMI Description
See the Intelligent Platform Management
Interface Specification, Version 2.0, Table
42-3 for allowable values.
Number of sensor that generated this
event.
Bit [7:6]
00b = ED2 unspecified
10b = ED2 contains OEM value
Bit [5:4]
00b = ED3 unspecified
10b = ED3 contains OEM value (The
BIOS does not use encodings 01b or
11b for errors discussed in this
document.).
Bit [3:0]
See the Intelligent Platform Management
Interface Specification, Version 2.0, Table
42-3 for the event.
Bit [7:0]
OEM value or unspecified
Intel order number E18291-001
Event Data 1 Event Data 2
0xA0 0x90
The BIOS sends this to the BMC:
0x10 = Event Logging Disabled
The BIOS sends this to the BMC:
0x08 = Correctable Memory Error
Logging Disabled
The BIOS sends this to the BMC:
Bit[7:6] = 10b - ED2 contains OEM value
Bit[5:4] = 00b - ED3 unspecified
Bit[3:0] - Supported Sensor Offsets
0x0 - Correctable Memory Error
Logging Disabled
The BIOS sends this to the BMC:
Memory module/device identification
Bit [7:6] - Index into SMBIOS Type 16
entry
This shall be the zero-based memory
riser board number.
ESB2 BMC Core TPS
Event Data 3
0x81
BIOS Implementation
Revision 1.0