Intel S7000FC4UR Technical Product Specification page 37

Intel® Server System S7000FC4UR TPS
On the main board, breakout for differential pairs for the CPUs and the MCH are ganged
together to reduce output-to-output skew.
2.2.9.4 DB1900G* (Memory and PCI-Express* Clock Buffers)
The DB1900G* is a differential clock buffer supporting the memory, XDP, and PCI-Express*
clocks for the main board. There are two DB1900Gs* for memory and XDP, and one DB1900G*
for PCI-Express* devices. The memory DB1900Gs* receive their input sources from the
CK410B processor host clocks.
The memory DB1900G* provides 19 differential outputs. Eighteen outputs have gear ratio
configuration capability to support processor to memory speed flexibility (see table below), and
one output is set at 1:1 gear ratio for XDP. The PCI-Express* DB1900G* receives its input
source from the CK410B SRC (100 Mhz) output and does not need to use the DB1900Gs* gear
ratio capability. On the main board, the three DB1900Gs* are configured as detailed in the
following sections,
2.2.9.4.1 FBD Branch 0 DB1900G*
PLL Mode / High BW
BCLK input from CK410B
(16) FBD clock differential pairs to support FBD memory risers 1 and 2 (eight DIMM slots
each). Gear ratio set according to description below.
(1) FBD clock differential pair to MCH. Gear ratio set according to description below.
2.2.9.4.2 FBD Branch 1 DB1900G*
PLL Mode / High BW
BCLK input from CK410G
(16) FBD clock differential pairs to support FBD Memory Risers 3 and 4 (eight DIMM
slots each). Gear ratio set according to description below.
(1) FBD clock differential pair to MCH (Gear ratio set according to description below)
(1) Host clock differential pair to XDP2 (Chipset) connector
2.2.9.4.3 PCI-Express* DB1900G*
Bypass Mode (1:1 ratio) / BW N/A
SRC input from CK410B
Seven SRC differential pairs to seven PCI-Express* slots
Five SRC differential pairs to I/O Riser (only one used by Intel
Ethernet Controller LOM, four are dedicated for OEM I/O riser)
One SRC differential pair to SAS Riser
Four SRC differential pairs to two X24 PCI-Express* expanders
One SRC differential pair to Midbus LAI
Revision 1.0
Main Board
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82575EB Gigabit
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