Power-Up Sequence - Intel S7000FC4UR Technical Product Specification

Intel® Server System S7000FC4UR TPS
22.1.3

Power-up Sequence

To power up the server, the BMC simulates the front panel power button being pressed for 8
seconds or until POWER_GOOD is asserted. If POWER_GOOD is not asserted within 8
seconds, then a fault is generated. See section 22.19.1.4.
22.1.4 Power Down Sequence
To power down the system, the BMC simulates the front panel power button being pressed for 2
seconds or until POWER_GOOD is deasserted. If POWER_GOOD is not deasserted within 2
seconds, then a fault is generated. See section 22.19.1.5.
Before initiating the system power down, the BMC stops scanning any sensors that should not
be scanned in the powered-down state.
22.1.5 Power Control Sources
The following sources can initiate power-up and / or power-down activity.
22.1.5.1 Power Button Signal
The POWER_BUTTON signal toggles the system power. This signal is activated by a
momentary contact switch on the front panel assembly and is routed to the BMC as a bi-
directional signal. The BMC de-bounces and monitors the signal. The signal must be in a
constant state for 50 ms before it is treated as asserted.
The signal is routed to the CHIPSET_PWR_BUTTON signal through blocking circuitry that
allows the BMC to lock out the signal. The chipset responds to the assertion of the signal; it
reacts to the press of the button, not the release of it. The chipset does not respond when
secure mode is enabled and active. See section 22.6.5 for secure mode information.
22.1.5.2 Chipset Sleep S5
The BMC monitors the sleep S5 signal to provide an indication of power state change requests.
The S5 signal is only used for monitoring S5 transitions because S4 is not supported. This
signal is the same as the POWER_ON signal. It is routed to the power sub-system.
The BMC requires the sleep S5 signal to maintain its level for at least 15 ms to be recognized.
This signal can change state as a result of the following events:
Operating system request
Real-time clock (RTC) alarm
Chipset power button request response, including BMC-initiated power state changes
22.1.5.3 Power-On Enable
The BMC must assert the POWER_ON_ENABLE signal to enable the system to power-on.
When AC power is applied, the BMC initializes this signal to a de-asserted state. After the BMC
has completed a specific phase of its initialization it asserts this signal. This prevents potential
race conditions between the BMC and the BIOS.
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BMC Functional Specifications
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