Post Memory Test; Publishing System Memory - Intel S7000FC4UR Technical Product Specification

Intel® Server System S7000FC4UR TPS
14.2.11

POST Memory Test

The server system supports the Fully-Buffered DIMM (FBD) Memory BIST (MemBIST) engine to
initialize and test system memory during the BIOS POST. This MemBIST feature provides
extensive coverage of memory errors at both the memory cell level and the data paths
emanating from the FBDIMMs.
The BIOS uses this in-built MemBIST engine to perform two specific operations:
ECC fill operation
Extensive FBDIMM testing
14.2.11.1 ECC Fill Operation
An ECC fill operation allows the memory contents set to a known state. This provides a bare
minimal error detection capability and is referred to as the Basic Memory Test algorithm.
14.2.11.2 Extensive FBDIMM Testing
This extensive FBDIMM testing searches for memory errors on both the memory cells and data
paths. This is referred to as the Comprehensive Memory Test algorithm.
The MemBIST engine replaces the traditional BIOS-based software memory tests and is much
faster than the traditional memory tests thereby reducing overall memory initialization time.
14.2.12

Publishing System Memory

The BIOS notifies the user of installed memory as follows:
The BIOS displays the "Total Memory" of the system during POST if Quiet Boot is
disabled in BIOS Setup. This is the total size of memory discovered by the BIOS during
POST representing the sum of the individual sizes of FBDIMMs.
The BIOS displays the "Effective Memory" of the system in the BIOS Setup. This is the
total size of all FBDIMMs that are active (not disabled) and not used as redundant units.
The BIOS provides the total memory of the system in the main page of BIOS Setup. This
figure is identical to the "Total Memory" figure reported during POST.
The BIOS provides the total amount of memory by supporting the EFI Boot Service
function GetMemoryMap().
The BIOS provides the total amount of memory by supporting the Interrupt 15h, Function
E820h memory map. See the Advanced Configuration and Power Interface
Specification, Revision 3.0 for details.
Note: The Interrupt 15h, Function E820h system address map reports the memory hole region
as reserved (not available memory). Any physical memory behind the hole is relocated above
the 4GB boundary and is available to operating systems that support PAE or Intel
Section 14.2.9 for more information.
Revision 1.0
BIOS Initialization
®
EM64T. See
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