Power Supply Status Sensors - Intel S7000FC4UR Technical Product Specification

BMC Functional Specifications
The BMC provides system status indication via the front panel LEDs as described in
section 3.6.2.
The BMC generates a beep code for Power Control Fault. See Table 101.
22.19.1.5 Power Unit Failure
The BMC asserts the Power Unit Failure offset of the Power Unit sensor for the following
situations:
Power-good dropout (see section 22.1.2).
The system fails to power down: The POWER_GOOD signal fails to transition to the de-
asserted state within 2 second when any of the enabled power control sources attempt
to transition the system to the power-off state.
The system fails to power-on due to any enabled hardware power control source: The
POWER_GOOD signal from the power sub-system fails to assert within 2 seconds in
response to a chipset or front panel power button request to power on.
The BMC provides system status indication via the front panel LEDs as described in
section 3.6.2.
The BMC generates a beep code for a power fault. See Table 101.
Power distribution board (PDB) failure is detected. This is supported only for power supply
configurations that have a PDB with a PSMI device.
22.19.2

Power Supply Status Sensors

The BMC processes the AC lost indication to avoid logging an AC lost event against multiple
supplies when all supplies are unplugged simultaneously or AC power to the server is shut off.
In these cases, the BMC only logs an AC lost event against the power unit sensor when AC is
next applied to the system.
The PS1 status sensor SDR is always installed during the normal SDR installation process. The
PS2 status sensor is only installed if that power supply is present at the time of SDR installation.
22.19.3 Power Unit Redundancy
The BMC supports redundant power sub-systems and implements a Power Unit Redundancy
sensor per platform. A Power Unit Redundancy sensor is of sensor type Power Unit (09h) and
reading type Availability Status (0Bh). This sensor generates events when a power sub-system
transitions between redundant and non-redundant states, as determined by the number and
health of the power sub-system's component power supplies. The BMC allows redundancy to
be configured on a per power-unit-redundancy sensor basis via the OEM SDR records.
The power unit redundancy sensor SDR is only installed if both PS1 and PS2 are present at the
time of SDR installation.
22.19.4 Power Fault Analysis
A single power good signal from each power unit components are monitored by the BMC. The
BMC supports individual discrete sensors for the VR/D2D status, for the power fault analysis
274
Intel order number E18291-001
ESB2 BMC Core TPS
Revision 1.0