Intel® 7300 Chipset Memory Controller Hub - Intel S7000FC4UR Technical Product Specification

Intel® Server System S7000FC4UR TPS
On-demand Mode: Software controllable method to reduce power consumption
Platform Environment Control Interface (PECI)
Streaming Single Instruction, Multiple Data (SIMD) Extensions 2 and 3 (SSE2, SSE3)
2.2.1.1 Processor Heatsink
The main board uses the Common Enabling Kit (CEK) heatsink solution. The CEK design
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meets the 64-bit Intel
consists of the following components:
Passive heatsink (with captive standoff and screws)
Thermal Interface Material (TIM-2) – to cover the entire processor Integrated Heat
Spreader (I) and the heatsink base
Hat spring/backplate – mounted on the backside of the main board
2.2.1.2 Processor Installation Order
The four-processor sockets are on independent front side buses. Therefore, there are no
installation order requirements enforced by the platform. The user is free to install supported
processors in any configuration desired.
However, one logical order is as follows:
1. Populate the lower number processor sockets.
2. Move to the higher numbers.
3. Populate sockets in the following order: socket 1, socket 2, socket 3, and socket 4).
The board does not support mixing different processor models.
2.2.2 Intel® 7300 Chipset Memory Controller Hub
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The Intel 7300 Chipset Memory Controller Hub is the highest performance, most scalable
chipset offering in the 64-bit Intel
improvement to Intel's four-way multi-processor platform.
2.2.2.1 Intel® 7300 Chipset Features
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The Intel 7300 Chipset Memory Controller Hub is the center of the Intel
S7000FC4UR architecture. This chipset is designed for multi-core processors and includes the
advanced features detailed in the following bullets. For more detailed information, refer to the
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7300 Chipset Datasheets referenced in the Appendix:
Intel
Up to four 64-bit Intel
optimized for server applications.
Maintains coherency across four independent FSBs.
Double-pumped 40-bit address buses with a total address bandwidth of 133 million
addresses per second.
Revision 1.0
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Xeon Processors MP thermal performance targets. Each CEK heatsink
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Xeon Processor MP family. The chipset represents an
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Xeon Processors MP via independent 1067 MT/S FSBs
Main Board
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Server System
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