Main Board Memory Interface; Table 3. Pci Interrupt Mapping; Table 4. Idsel Mapping; Table 5. Arbitration Connections - Intel S7000FC4UR Technical Product Specification

Intel® Server System S7000FC4UR TPS
Table 3 describes how the interrupts for each of the PCI devices are mapped to the Enterprise
Southbridge 2.
Device
RN50 Video
Controller
2.2.5.2 PCI IDSEL Signal
The IDSEL signal is used as a chip-select for PCI32 devices during read/write transactions. The
Enterprise Southbridge 2 PCI32 controller asserts a specific address bit on a given PCI bus to
toggle the IDSEL signal to the PCI device. For the main board, the address bit to IDSEL
mapping is shown in Table 4.
RN50 Video Controller
2.2.5.3 PCI Bus Arbitration Signals
Request (REQ#) signals indicate to the bus arbiter that an agent/device desires the use of the
bus. The Grant (GNT#) signal indicates to the agent/device that access to the bus has been
granted. Every master has its own REQ#, which must be tri-stated while RST# is asserted.
These are point-to-point signals, which are assigned to every bus master.
RN50 Video Controller
2.2.6

Main board Memory Interface

The main board includes four 164 pin x16 PCI-Express* connectors that interface with up to four
Memory Risers. Each of these Memory Riser connectors are individually connected to one of
the four MCH's FBD channels.
Serial Presence Detect (SPD) side-band signals are also passed between the Memory Risers
®
and the Intel 7300 Chipset MCH.
The main board supports the following memory riser population configurations:
Revision 1.0

Table 3. PCI Interrupt Mapping

Enterprise Southbridge 2 PCI Host Bridge
INTA# INTB#
INTA#
[ESB_PIRQB_N]

Table 4. IDSEL Mapping

Device Device Number
12

Table 5. Arbitration Connections

Device REQ#
0
INTC#
IDSEL Host Bridge
AD28 Enterprise Southbridge 2
GNT# Host Bridge
0 Enterprise Southbridge 2
Main Board
INTD#
11