Table 85. Sel Entry Format - Memory Sensor Type Examples; Table 86. Sel Entry Format - System Firmware Progress Sensor Type; Ipmi Sensor Type Events — System Firmware Progress - Intel S7000FC4UR Technical Product Specification

Intel® Server System S7000FC4UR TPS
Table 85. SEL Entry Format — Memory Sensor Type Examples
Error Type
Correctable ECC Memory Error
Memory Riser Board A, FBDIMM 6
Uncorrectable ECC Memory Error
Memory Riser Board B, FBDIMM 5
19.2.5 IPMI Sensor Type Events — System Firmware Progress
The BIOS is responsible for logging SEL entries for BIOS POST errors using the IPMI System
Firmware Progress sensor type. BIOS only supports the following sensor offset for this sensor
type:
Sensor Offset 00h — System Firmware Error (POST Error)
See the Intelligent Platform Management Interface Specification, Version 2.0, Intel Corporation
Table 42-3 for the following implementation details:
Table 86. SEL Entry Format — System Firmware Progress Sensor Type
Byte Field
11 Sensor Type
12 Sensor
Number
14 Event Data 1
(ED1)
15 Event Data 2
(ED2)
16 Event Data 3
(ED3)
Revision 1.0
IPMI Description
See the Intelligent Platform
Management Interface Specification,
Version 2.0, Table 42-3 for allowable
values.
Number of sensor that generated this
event.
Bit[7:6]
00b = ED2 unspecified
10b = ED2 contains OEM value
Bit[5:4]
00b = ED3 unspecified
10b = ED3 contains OEM value
(The BIOS does not use
encodings 01b or 11b for errors
discussed in this document.).
Bit [3:0]
See the Intelligent Platform
Management Interface Specification,
Version 2.0, Table 42-3 for the event.
Bit [7:0]
OEM value or unspecified
Bit [7:0]
OEM value or unspecified
Event Data 1 Event Data 2
0x20 0xFF
0x21 0xFF
BIOS Implementation
The BIOS sends this to the BMC:
0x0F = System Firmware Progress
The BIOS sends this to the BMC:
0x06 = POST Error (BIOS)
The BIOS sends this to the BMC:
Bit[7:6] = 10b - ED2 contains OEM value
Bit[5:4] = 10b - ED3 contains OEM value
Bit[3:0] - Supported Sensor Offsets
0x0 — System Firmware Error (POST
Error)
The BIOS sends this to the BMC:
Bit[7:0] - Least Significant Byte of the 16-
bit POST error code
The BIOS sends this to the BMC:
Bit[7:0] - Most Significant Byte of the 16-
bit POST error code
BIOS Error Handling
Event Data 3
0x06
Bit [7:6] = 00
Bit [5:0] = 06
0x45
Bits [7:6] = 01
Bits [5:0] = 05
231