Memory Riser; Functional Architecture; Fbd Memory Sub-System Overview - Intel S7000FC4UR Technical Product Specification

Memory Riser

4. Memory Riser
This chapter describes the memory riser. Up to four memory risers plug vertically into the main
board. The memory riser has the following features:
Supports up to eight FBD Generation 1 DIMMs
Supports FBD speeds of 533MT/s (4-4-4, 5-5-5 latencies) and 667MT/s (5-5-5 latency)
Supports FBDIMM configurations of x8, x4, single, dual-rank DDR2 DRAMs
Supports DDR2 DRAM technologies of 512Mbit, 1Gbit and 2Gbit
Supports Closed Loop Thermal Throttling by using FBDIMM AMB temp sensors
Supports Open Loop Thermal Throttling by using on board temp sensor (NE1617) -
Optional
PCI-Express* x16 card edge connector that plugs into the main board
LED fault indicators for each DIMM
On-board voltage regulators for 0.9V (Vtt), 1.5V (Vcc), and 1.8V (Vdd)
One Field Replaceable Unit (FRU) EEPROM
Supports Memory Mirroring and Memory Sparing.
4.1

Functional Architecture

4.1.1

FBD Memory Sub-system Overview

®
The Intel 7300 Chipset MCH on the main board supports a fully buffered DIMM (FBD) memory
subsystem. The FBD interface consists of four channels (Ch A, B, C and D) routing to a total of
four memory risers (1 channel per riser, with 8 FBD connectors per riser). This data bus is a 24
lane per channel (14 northbound and 10 southbound) point-to-point high-speed differential
interface. For each channel, FBD transfers 144 bits every Northbound data frame, which is
equivalent to the 18 byte data (16 bytes of data, 2 bytes of ECC) transfer of an ECC DDR DIMM
in a single clock. So the peak theoretical throughput of the Northbound data connection is
identical to that of a DDR2-533 subsystem (8 bytes x 533MT/s = 4.267GB/s). Since the
southbound lanes include commands along with data, the peak theoretical throughput of the
southbound data connection is equivalent to half a DDR2-533 (2.133GB/s). Therefore, the
overall peak theoretical throughput of an FBD-533 (267MHz DDR2 reference clock) channel
would be 6.4BGB/s (northbound plus southbound). The peak theoretical throughput would scale
to 8GB/s, as the DDR2 reference clock and FB DIMMs increase to 333MHz and FBD-DDR2-
667, respectively. The peak theoretical bandwidth is actually limited by several factors including:
the number of DIMMs, memory capacity, bus utilization, and various sub-system latencies.
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Intel order number E18291-001
Intel® Server System S7000FC4UR TPS
Revision 1.0