A31 Trigger - HP 3562A Service Manual

Dynamic signal analyzer
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MOD E L 3562A
6-1 4 A3 1 TRIGGER
The trigger asse mbly p rod u ces the trigger signal (TR I G RO) for th e A1 Di gital Sou rce and
the A5 D igital Fi lter and the sam ple signal (CO NY) that is sent to the A32, A34 ADCs.
The trigger assembly also generates the 1 0.24 MHz clock used by the A1 D igital Sou rce,
the A4 Local osci l l ator, the A5 Digital Fi lter, the A6 Digital Fi lter Control ler, the A30 Analog
Sou rce, and the A32, A34 ADCs asse m b l ies. The 1 0.1 4 M H z c l ock can be locked to an
extern a l reference signal by u s i n g the rear panel RE F I N i n put.
Trigger Level Circuit
(Refer to figure 6-A31 a) To p rod u ce the trigger leve l, the trigger assembly uses one of four
analog inpu ts; external trigger (EXT TRI G G E R), channel 1 (T R I G1 @ ), channel 2 (T R I G 2 @ ),
or trigger c a l i b ration (CAL T R I G). The tri gger sel ect switc h selects one of the i n pu t signals
and passes it to a com parator. The sel ected analog i n put is com pared to a dc voltage
from the tri gger's DAC . The output of the comparator is lbw as long as the analog si gnal
is below this 'dc value and i s h igh if the analog s ignal is above the dc val ue. The output
of the comparator is then sent through an exc l u sive OR gate w h i c h i nverts the signal if
the s lope select l i ne is h i g h .
Trigger Control
The operations of the trigger assembly are control led through the trigger's s h ift reg ister.
The sh ift registe r sh ifts in a com mand word from the A1 D i g ital Sou rce assemb ly. The
comm and word sets the i n put trigger selection, the trigger level, the trigger sl ope, and
whether an i nternal . or external sam ple is used (SE LXS).
C I RC U I T D E SCR I PT I O N S
6-1 05/6-1 06

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