HP 3562A Service Manual page 276

Dynamic signal analyzer
Hide thumbs Also See for 3562A:
Table of Contents

Advertisement

MO D E L 3562A
R D I B C I N T L
R D I B C STAT l
SETB lKREADYl
S F lTRST
STO PE N l
T P U lSE
T R I G ATE l
T R I G G E R ED
T R I G G E R F lG
WRI BCCM D l
WRINTMSKl
Internal Signal Descriptions, AS
2XC lK l
C H 1 A[DDATA
C H 1 A E N , C H 2AEN
C H 1 B R 1 , C H 2 B R1
C H 1 B R 2, C H 2 B R 2
CH1 B R3, C H 2 B R 3
C H 1 DACK3 l,
CH 2DACK3 l
C H 1 D I S 1 , C H 2 D IS1
CH1 DI S2, C H 2 D I S 2
C H 1 D IS3, C H 2 D I S 2
C H 1 DMACS,
CH 2D MACS
Read inp ut buffe r contro l i nterrupts
Read i n p ut buffer control status. Latches status word from
status reg iste r onto the local data bus
Term i n ates a meas u re ment by generati ng a CPU i nterrupt
Set fi lter reset
Stop enable
Test p u l se, repl aces system clock s ignal when A6J 2 i s i n test
pos ition
S ignal from trigger control ler to cou nters to continue counting
i n put sam ples
See F R E E R U N
Set i f a valid trigger event h a s occu rred afte r b e i n g armed
Write i n put buffer control com m and. C locks commands from
the local data bus i nto the comm and register
Write i nterrupt mask. U sed to mask i nte rrupt fl ags
The buffered on-board 1 0 .24 M H z cl ock
Serial data i n puts from the ADC assem bly w h i c h h ave
C H 2AjD DATA been rec l ocked by U51 2
Channel 1 and channel 2 add ress enable
Bus requ ests for DMA channels 1, 2, and 3
Data ack nowledge, channel 1 and channel 2
Disable DMA modes 1 , 2, and 3
E n able channel 1 or c h annel 2 of the DMA Poi nter Regi ster
and DMA Contro l l er
C I RC U I T D E SCR I PT I O N S
6-5 5

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents