HP 3562A Service Manual page 455

Dynamic signal analyzer
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MOD E L 3562A
#
Bit
Signal Name
0
L DCH1 L
1
LDC H 2 L
2
L DTRL
3
LDSRCL
4
S RCO UTFAL TL
5
U N LOCK
6
C1 0FSE
7
CNTLD
8
NCLK
9
DO UT
1 0
DM I D
1 1
N S R
1 2
C N T R L BUSY
1 3
BUSYL
1 4
T R I G G E R E D
1 5
ARM E D L
-
D igital Source
Counters Fail
Table A 1 -2
Digital Source Diagnostics
From
Component
U208-6
U208-7
U208-5
U208-4
-
-
U1 01 -7
U206-9
U202-1 2
U209-6
U1 3-1 3
U31 1 -1 1
U1 06-8
U5-1 4
U8-9
U5-1 5
U305, U7,
U1 07, U1 08
Subblock Returning Status Bit
Probable subblock failing
Control Registers
(Go to part E, step 7)
Status Registers
(Go to part E )
T i m i n g Control Ci rcu it
(Go to part D)
Control Registers
(Go to part E, step 7)
Burst Control Ci rcu it
(Go to part E , step 5)
Mu ltipl ier
E)
(Go to part
LO I nput Receiver
(Go to part E)
N oise G enerator
(Go to part E, step 8)
Control Registers
(Go to part E, step 7)
Phase Resol ution C ircu it
(Go to part E)
These counters are used in the
fol lowing su bblocks:
Phase Resol ution Ci rcu it
T i m i n g Control C ircuit
B u rst Control C ircuit
(Go to part E)
S E RV I C E
8-5

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