HP 3562A Service Manual page 332

Dynamic signal analyzer
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C I RC U I T D E SC R I PT I O NS
The anti-al ias f i l ter is a passive low pass f il ter whose b reak freq uency i s 1 00 k H z . Fo l lowi ng
t h i s fi lter are two non-inverting op am ps, eac h with a gain of 3, which feed the track and
h o l d c i rcu it.
The track and hold c i rc u it is contro l l ed by the CONY s i g n a l from the trigger board and
&
the TRH (track
and the contro l ler term i nates it. The p u rpose of the track and hold circ u it is to hold the
voltage of the i n put signal for the peri od of time req u i red for the va l u e to be d ig itized.
W hen tracki ng, the c i rcuit acts l ike an i nverting a m p l if ier. See figu re 6-A32 a .
T/H OUT
T/H
I N
TP600
Figure 6-A32a
Track
Digital
" e conversIOn process starts
c oord inates t h e two passes and contr ? ls the p rocess switc hes on both board s . The
T/H OUT signal is converted to a 1 3-bit d ig ital word by passing the s i g n a l thro u g h an
8-b it A/D converter twice as descri bed in the fo l lowing d iscussi on .
The f i rst pass c i rcuit takes the track and hold ou tput, divides it by fo u r, and leve l s h ifts
it for the A/D converter. The contro l l e r then sets the process switc h (U405) to send th i s
signal to the AID converter (see tab le 6-A32b for process switch configu ration i nformation).
When the convers ion is com plete, the 8-b it word goes to the contro l l e r w h i c h com b i nes
the word with d ither (a noise signal generated i ns ide the contro l l e r c h i p) a nd outp u ts a
1 3-b it word to the DAC.
6-1 1 6
hold) signal from the ADC contro l l er. The CONY signal i n itiates the "hold"
&
hold Input vs. output
en
controller receives a start conversion s ignal CCONV)
w ·
e
MODE L 3562A
TRACK
HOLD

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