HP 3562A Service Manual page 253

Dynamic signal analyzer
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CONTROL L I N ES
MO N ITOR
M EMORY
I NVRAM
BATT E RY
BACK U P
I I
to D7
CPU DATA BUS
:ystem CPu/HPIS Slock DIagram
SYST EM BUS
C O N T R O L
D R I V E R
CPU DATA BUS
,
,
I
....
HANDSHAKE LIN E S
CONTROL L I N E S
SYSTEM
A D D R E S S
D R I V E R
SYST E M
DATA
B U F F E R
D I RCT
G LO BA L
A D D R E S S
B U F F E R
R/WL
G L O BA L
B U S
D R I V E R
G LO BA L
B U S
LATCH
G LRDEN
G LSTB
G L O BAL
B U S
CONTROL
H P- I B
A1 to A3
ICs
TO SYSTEM BUS
SYSTEM ADDRESS BUS
A1 Lto A23L
SYSTEM DATA
BUS
D</>L to D1 5L
G LO BAL
ADDRESS BUS
GAI L-TOGA16L
MG68L
G LO BAL DATA
BUS
GD</>L TO GD1 5L
G R/GWL
H P I B
DTACKL
VPAL
MR68L
R EMTG L
MG68L
6-31 /6-32

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