HP 3562A Service Manual page 350

MO D E L 3 562A
DSH I FTEN
DTACKl
EOC
E O I
E N B ll
EXT SAM P LE I N
EXT TRI G G E R
DATA S H I FT
Sh ift clock from the A1 D igita l Sou rce to the A30 Analog Sou rce that
i s used to sh ift i n the DAC DA T data.
DATA T RA N S F E R ACKNOW L E D G E
Active Low
T h i s is an open c o l lector signal that is pu l led up to
System C P U . After an assembly receives the data strobes (UDSL, LDSL,
o r ASL) and has performed the appropriate read or write operation,
it sends the A2 System CPU the handshake signal DTAC KL. This s i g n a l
i nd icates that t h e d ata has b e e n tra nsferred . T h e CPU puts t h e bus
cyc le in the wait mode u nti l it receives the DTAC KL s i g n a l o r 1 ms
has passed and B E RR L is asserted. The fol lowing asse m b l ies use the
asynchronous DT AC K L signal for d ata transfe r:
A1
D igital Sou rce
A3
P rogram RoM
A6 D igital Fi l ter Contro l l er
A7
F loating Point T ransform P rocessor
AB G lobal RAM/D isplay
A9
Fast Fourier Processor
A1 5 Keyboard
E N D OF CONV E RS IO N
(A32, A34 TP605)
This signal is used by the A32 ADC 1 and the A34 ADC 2. When both
assem b l ies are i nsta l l ed, ADC 2 te l l s ADC 1 when it is done with a
conversion.
E N D
Signal to and from the A 2 System C P U to the A22 H P-I nterface Bus.
'
This l i n e i s used to i nd i c ate the end of a m u l ti p l e-byte message on
the bus. I t is also used in para l lel po l l ing.
E NA B L E
Active Low
E XT E RNAL SAM P L E I N PUT
(A31 J 501 )
Sample rate from the rear panel to the A31 Trigger assem bly. This signal
i s active only in external sam p l e mode.
E X T E R N A L TR I G G E R
(A31 J 2)
T h e external trigger i n put from the front panel to the A31 Trigger
assemb ly. This input has a 50 kO input resistance and a range of ± 1 0V.
C I RC U I T D E S CR I PT I O N S
+
5V on the -A2
6-1 3 5