HP 3562A Service Manual page 251

MO D E L 3 562A
Programmable Timer Module
The programmable timer mod u l e is an i nternal time base generator, cl ocked by the E N B L
clock fro m the system processor. T h i s timer is used for function time outs an<;l to m ai nta i n
re l ative t i m e i nterva ls. This m od u l e conta i n s th ree clocks which get add ressed b y s ignals
A1 to A3. The clock s are loaded and read by the system processor using the C P U data
l i nes DO to D7. A clock i s enabled by the p rogram timer m od u le s i g n a l PTM L. When the
program timer m od u l e cl ock f i n ishes cou nti ng, the i nterrupt req uest I RQT7L is generated .
Bus Time Out
When a system p rocessor bus cyc l e is i n itiated, the bus ti me out ripple cou nter is started
and runs u nt i l either the handshake is com pleted (DTAC K L or VPAL is received) or the
cou nter reaches its term i n a l cou nt. I f the timer reac hes the term i n al cou nt of 32 p.,s
before the handshake is com p l eted, the bus error l i ne ( B E RRL) to the system p rocessor
is asserted to abort the cu rrent bus cycle. The system processor then begi n s process ing
for the bus error. Bus errors are entered i n the fault log along with the name of the assembly
that f a i l ed to send the handshake s i g n a l .
Status Decoder
When the system processor is perfor m i ng an ope ration, the status decoder l ights one of
the status L E Ds (DS2). The status operations and correspond i ng L E Ds are as fo l lows:
LED
DS2-5
DS2-4
DS2-3
Label
Descri pti on
U D
User Data, CP U i n user state and accessing d ata
U P
U ser Program, CPU i n user state and accessi n g p rogram
SD
S u pervisor D ata, CPU in su pervisor state and accessing
d ata
S P
S u peivisOi PiOgiam, CPU i n su pervisor state and acces s i n g
p rogram
C I RC U I T D E SC R I PT I ON S
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