HP 3562A Service Manual page 339

Dynamic signal analyzer
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C I RC U I T D E SC R I PT I O N S
le
Pin No.
7
8
9
1 0
1 1
1 2
1 3
Attenuators and Buffers
T h e i n put re lay switches perform the fol lowi ng fu nctions: isolate the i n p ut connectors
w h e n the i n ternal sou rce is con nected, p rovide ac/dc cou p l i n g, and select 0 d B, 20 d B,
o r 40 d B i n p u t attenuation. The atte nu ated s i g n a l leads to a FET source-fo l l ower buffer
and then a u n ity gai n operatio nal ampl ifier (U351 ) with the FET in its feed back loop. As
a
resu lt, any offsets in the sou rce fo l l ower are e l i m i nated.
The bootstrapp ing of the power suppl ies consists of two cu rrent sou rces, one pos itive and
one negative, with two em itter fo l l owers. The e m itter fol lower provides the power to the
b
.
u ffer wh i l e the cu rrent sou rce keeps the voltage ac ross the zener at S .6Y above the i n put.
T h is c reates a stab le power su pply for the buffer so it has u n ity gain for a wide voltage
range even at h i gh frequenc ies. The 30V p rotection d i odes are also bootstrapped to the
power s u p p ly to avo id d i stortion. The LOW side of the i n pu t has the same configu ration.
The input overload detector c i rcuit receives its input from the H I G H signal path. It is active
w hen the i n put s ignal to ground is over the l i m it of 20Y with no attenuation. Res istors
RS03 and RS02 atte nuate the si gnal for the com parators (US01 A , U S01 B). The atte n u ated
s ig n a l is compared to a pos itive and negative reference voltage. I f the value is greater
than the refere nce leve l , the i n put ove rl oad s i g n a l (COY LD) is sent to the overload c i rcu it
on the ADC assemb ly.
Common Mode Rejection DAC
The com m o n mode rejection DAC is a d is crete DAC com posed of operational a m p l ifiers,
FE Ts, and a res istor network. The DAC rece ives its d i gital i n p u t from the i nterface sh ift
registers. The common mode rejection DAC's output is an effective resistance val ue which
c o m pensates for d ifferen ces between the H I G H i n put and the LOW i n p u t ci rcu its.
6-1 24
Table 6-A33 Control Word
Description
ac/dc Cou p l i ng
d c
I nput E na b l e
D isconnected
I nterna l
D i sables i n p uts
Sou rce E na b l e
a n d connects
i nternal source
G round Low
Return s i g n a l s horted
to chassis grou nd
o
Attenuation
Select
20 d B
40 d B
For attenuator settings refer to tabl e 6-A32a.
Function
=
If bit
"1 "
a c
Connected if Sou rce
E nable is low
I nputs can be
connected
dB
O n ly one should
b e selected at a
time.
MO D E L 3S62A
=
"0"
If bit
Note
.

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