HP 3562A Service Manual page 274

Dynamic signal analyzer
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MOD E L 3S62A
The trigger contro l l e r activates TR I G AT E L, s igna l i ng the cou nters to conti n u e
counting i n put samples, and the measu rement r u n s to com pletion.
The start/stop contro l l er controls the AS D igital Fi lter outputs. CH1 STO P1 controls
D F1 m a i n outp ut and CH 2STOP1 contro ls D F2 m a i n output.
When a tri gge red measurement is co mplete the output of the start/stop contro l ler
( B L K DO N E ) is sent to the m easurement control state machine.
I N TE RRUPTS
There are six i nterrupt f l ags:
TR I G G E R E D
MARK E R
B LOC K3 F U L L
B LOCK2 F U LL
BLOCK1 F U L L
I N BLOC K E M PTY
When one of these i nterrupt f l ags is set, the di gital fi lter control ler sends an i nterru pt
(l RQTS L) to the A2 System C P U . After rece ivi ng the i nterru pt, the system CPU reads the
I nterrupt Reg ister Latch (U302) to determ ine w h i c h signal caused the i nte rru pt.
Any com b i n ation of fl ags may be c l eared through the C L R I NTL signal and the local data
bus. These two signai s are AN Ded together i nto the CLR i n puts of each of the i nterru pt
f l ag f l i p-flop reg isters. Typical ly, the i nte rrupt ro utine c lears only the flag it deals with .
The inte rrupt mask regi ster (A6 U301) is a write only register that a l l ows sel ective enab l i n g
o f the i nterru pting events. The correspond ing b i t in the mask register must b e set t o enable
an inte rrupting event to cause a system i nte rru pt.
T R I G G E R L E D CONTROL
T h is c i rc u it is com posed of a dual m onostable m u ltivibrator (A6U31 0) and a one-of-e ight
mu ltip lexer (A6U41 0). This c ircu itry causes the front panel T R I G G E R I N G L E D to flash once
each time a trigger is received .
Set if a val id trigger event has occu rred afte r ARML is
activated
Set if a marker count has f i n ished d u ring a freeru n
me as u rement
Set when the meas u rement mode data bl ocks are complete
for both channels
Set when auxi l iary data block 2 is f i l led
Set when the fi ltered auxi l i ary data bl ock is f i l led
Set when the para l l e l i n put data b l ocks have been emptied
C I RC U I T D E SC R I PT I O N S
6-5 3

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