HP 3562A Service Manual page 241

MODE L 3562A
(Refer to figure 6-A1 d) The burst control circuit controls the burst length and generates
Burst Control Circuit
the pu lse signal (NC LK) to the local osc i l l ator. It provides the gating signal (BU RSTE N)
that gates the analog source on and off during the burst and chirp modes. The b u rst con­
trol circuit also provides the SYNC O U T signal to the rear panel. This signal is high when
the burst is on and is low when the bu rst is off.
When S E LCNTERSL is active and W R I T E L is low, a data word from the system C P U is
latched into the programmable cou nters to set the time the burst is on and off. After the
cou nters are programmed, the CONT signal from the contro l registers to the bu rst gate
goes low. I n freerun mode the f reerun bit (U1 02-9) is set and the burst counters count
blocks. The bu rst control circuit then gates the analog source on and off. I n the triggered
mode, the bu rst process starts when the A RMEDL signal from the phase resolution c i rcuit
goes low. The cou nters only cou nt when ARM E D L is low. The A RM E D L signal also cau ses
the bu rst control circuit to send the NCLK signal to the local oscil lator. When N C LK is
received by the local osci lla�or, the LO is set to the starting freq uency of the bu rst. The
local osci l l ator sends data (N DAT) to the digital source synchronized to NCLK. The d ata
is processed by the LO input receiver and m u ltipl ier. DACDAT data is sent to the an alog
source at the same time the bu rst control circuit turns on the analog source.
After the burst is completed, the b u rst state machine checks to see if the A RM E D L signal
is sti l l active. If A RM E DL is active, the process repeats. All burst control operations are
synchron ized to the sample and trigger signals by the timing control c ircuit and the
A RM E D L signal.
T I M I N G
CONTROL
S E LCNTRSL .... ..
�'_<'mJ�
DS DATA
BUS
CONT .... .. .
From
Local
Oscillator
Figure
6-A 1 d
B U RST
STATE
MAC H I N E
PROG RAMMA BLE
COUNTERS
I N PUT RECE I V E R
La
AND
N O I S E G E N E RATOR
Burst Control Circuit
B u rst
Gate
DACDAT
: :.. ..:=:. .-=. . . . .:::. .. . .".�"
C I RC U I T D E SC R I PT I O N S
B U RSTEN
ANALOG
SOURCE
A30
Sync Out
NCLK
To La
Sourcout
To Front
Panel
- - -
6-1 9