HP 3562A Service Manual page 252

Dynamic signal analyzer
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)
+5
DS1
STATUS
and
LEDs
STAT U S
D E COD E R
A N D
PWR UP
POW E R
U P/DOWN
SYST E M
C P U
CLOCK
P R I O R I TY
I N T E R R U PT
E N CO D E R
I RQT 2L
I RQT
to
6L
STATUS
8
SYSTEM
MHz
PROCESSOR
I RQT
7L
CPU DATA BUS Dc/>
A D D R E S S
UDSL
D E C O D E R
LDSL
R/WL
G L R QTL.
H A N D
LDTACKL
3
S H A K E
L VP AL
B E RRL
E R RO U T
B U S T I M E
OUT
to
Figure 6-1

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