Mitsubishi Electric MELSEC iQ-F FX5 User Manual page 455

CH1 Logging hold flag
The logging holding status can be checked.
For details on the logging function, refer to the following.
Page 371 Logging function
Monitor value
0
1
As data collection in 'CH1 Logging data' (Un\G10000 to Un\G19999) comes to a halt, this flag turns to ON (1).
When logging restarts by changing 'CH1 Logging hold request' (Un\G471) from ON (1)OFF (0), 'CH1 Logging hold flag'
(Un\G409) is turned to OFF (0).
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Logging hold flag
CH Logging hold flag (in FX2N allocation mode function)
CH1 Conversion status
The conversion status is stored.
Monitor value Conversion status
0 Conversion disable
1 Conversion start
2 Conversion completed
3 Input signal error detection in progress/
disconnection detection in progress
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Conversion status
CH Conversion status (In FX2N allocation mode function)
CH1 Maximum value reset completed flag
The reset status of maximum value can be checked.
'CH1 Maximum value' (Un\G404)
'Maximum value reset request'
(Un\G473)
'Maximum value reset
completed flag' (Un\G422)
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Maximum value reset completed flag
Description
OFF
ON
CH1 CH2
409 609
9021 9022
Setting content
A status of conversion disable. Conversion of the relevant channel is not executed.
A status from the conversion enabled to the initial conversion completed.
A status after the initial conversion completed. Conversion is being executed.
A status where an input signal error or disconnection is being detected.
CH1 CH2
420 620
1021 1022
Controlled by the multiple input module
Controlled by the program
Current digital operation value
ON
OFF
ON
OFF
CH1 CH2
422 622
CH3 CH4 CH5 CH6
809 1009 1209 1409
9023 9024 9025 9026
CH3 CH4 CH5 CH6
820 1020 1220 1420
1023 1024 1025 1026
CH3 CH4 CH5 CH6
822 1022 1222 1422
Appendix 12 Buffer Memory Areas
CH7 CH8
1609 1809
9027 9028
A
CH7 CH8
1620 1820
1027 1028
CH7 CH8
1622 1822
APPX
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