Mitsubishi Electric MELSEC iQ-F FX5 User Manual page 171

CH1 Digital filter setting
When Digital filter (5) is set in Average processing specification, Digital filter setting is executed.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Digital filter setting
CH Digital filter setting (In FX3 allocation
mode function)
■Setting range
The possible setting range is from 1 to 1600 (digits).
Setting a value out of the range causes a Digital filter setting range error (error code: 19DH), and the A/D conversion
processing is executed with the setting made before the error occurred.
■Enabling the setting
Turn offonoff 'Operating condition setting request' (Un\G70, b9) to enable the setting.
■Default value
The default value is 0 for all channels.
CH1 Digital filter fluctuation width setting
The fluctuation width to be removed by digital filter processing is set.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Digital filter fluctuation width setting
CH Digital filter fluctuation width setting (In
FX3 allocation mode function)
■Setting range
The possible setting range is from 80 to 200000 (s).
Set this value to Number of A/D conversion enabled channels  Conversion speed or more.
Setting a value out of the range causes a digital filter fluctuation width setting range error (error code: 19EH), and the A/D
conversion processing is executed with the setting made before the error occurred.
In the allowable setting range, when the value which is less than the value of "the Number of A/D conversion enable channels
 Conversion speed" is set, "Digital filter fluctuation width setting range error" (error code: 19EH) occurs and sampling
processing is operated.
■Enabling the setting
Turn offonoff 'Operating condition setting request' (Un\G70, b9) to enable the setting.
■Default value
The default value is 0 for all channels.
CH1 CH2
570 770
6 7
CH1 CH2
572, 573 772, 773
1340, 1341 1342, 1343
CH3 CH4
970 1170
8 9
CH3 CH4
972, 973 1172, 1173
1344, 1345 1346, 1347
Appendix 4 Buffer Memory Areas
A
APPX
169