Interrupt Control Register For Internal Sources - Intel 80C186XL User Manual

Register Name:
Register Mnemonic:
Register Function:
15
Bit
Bit Name
Mnemonic
MSK Interrupt
Mask
PM2:0 Priority
Level
NOTE: Reserved register bits are shown with gray shading. Reserved bits must be written
to a logic zero to ensure compatibility with future Intel products.
Figure 8-4. Interrupt Control Register for Internal Sources
Interrupt Control Register (internal sources)
TCUCON, DMA0CON, DMA1CON
Control register for the internal interrupt sources
Reset
State
1 Clear to enable interrupts from this source.
111 Defines the priority level for this source.
INTERRUPT CONTROL UNIT
0
M P P P
S M M M
K 2 1 0
A1213-A0
Function
8-13