Intel 80C186XL User Manual page 176

DRAM_BASE EQU 256
DRAM_SIZE EQU 256
DRAM_WAIT EQU 0
DRAM_RDY EQU INTRDY
;The MPCS register is used to program both the MCS and PCS chip-selects.
;Below are the equates for the I/O peripherals (also used to program the PACS
;register.
IO_WAIT EQU 4
IO_RDY EQU INTRDY
PCS_SPACE EQU IO
PCS_FUNC EQU ALLPCS
;The MMCS and MPCS register values are calculated using the above system
;constraints and the equations below:
MMCS_VAL EQU (DRAM_BASE SHL 6) OR (001F8H) OR (DRAM_RDY) OR (DRAM_WAIT)
MPCS_VAL EQU (DRAM_SIZE SHL 5) OR (08038H) OR (PCS_SPACE) OR (PCS_FUNC) OR
& (IO_RDY) OR (IO_WAIT)
;I/O is selected using the PCS0# chip-select. Wait states assume operation at
;16 MHz. For this example, the Floppy Disk Controller is connected to PCS2# and
;PCS1# provides the DACK signal.
IO_BASE EQU 1
;The PACS register value is calculated using the above system constraints and
;the equation below.
PACS_VAL EQU (IO_BASE SHL 6) OR (0038H) OR (IO_RDY) OR (IO_WAIT)
;The following statements define the default assumptions for segment locations.
ASSUME CS:CODE
ASSUME DS:DATA
ASSUME SS:DATA
ASSUME ES:DATA
CODE SEGMENT PUBLIC 'CODE'
;
;Entry point on power-up
;
FW_START LABEL FAR
CLI
;Place register initialization code here
;
;Set up chip-selects.
;UCS - EPROM Select
;LCS - SRAM Select
;PCS - I/O Select
;MCS - DRAM Select
mov dx, LMCS_REG
mov ax, LMCS_VAL
out dx, al
Example 6-1. Initializing the Chip-Select Unit (Continued)
;window start address in Kbytes
;window size in Kbytes
;wait states
;ignore bus ready
;IO wait states
;ignore bus ready
;put PCS# chip-selects in I/O space
;generate PCS5# and PCS6#
;I/O start address in Kbytes
;forces far jump
;disable interrupts
(initialized during POWER_ON code)
(set to SRAM size)
(PCS1:0 to support floppy)
(set to DRAM size)
;set up LMCS register
;remember that byte writes are OK
CHIP-SELECT UNIT
6-21