Intel 80C186XL User Manual page 282

; NOW WE NEED TO SET THE PARAMETERS FOR THE CHANNEL AS FOLLOWS:
;
; DESTINATION
; -----------
; I/O SPACE
; CONSTANT PTR
;
; TERMINATE ON TC, INTERRUPT, SOURCE SYNCHRONIZE, INTERNAL REQUESTS,
; LOW PRIORITY RELATIVE TO CHANNEL 1, BYTE XFERS.
MOV AX, 0001011101010110B
MOV DX, D0CON
OUT DX, AX
; NOW WE ASSUME THAT TIMER 2 HAS BEEN PROPERLY PROGRAMMED FOR A 22uS DELAY.
; WHEN THE TIMER IS STARTED, A DMA TRANSFER WILL OCCUR EVERY 22uS.
CODE_SEG ENDS
DATA_SEG SEGMENT
WAVEFORM_DATADB 0,1,2,3,4,5,6,7,8,9,10,11,12,13
DB 14,15,16,17,18,19,20,21,22,23,24
; ETC., UP TO 255
DATA_SEG ENDS
END START
Example 10-2. Timed DMA Transfers (Continued)
SOURCE
------
MEMORY SPACE
INCREMENT PTR
DIRECT MEMORY ACCESS UNIT
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