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Table D-2. Instruction Set Summary (Continued)
Function
ARITHMETIC INSTRUCTIONS (Continued)
AAM = ASCII adjust for multiply
DIV = Divide (unsigned)
register-byte
register-word
memory-byte
memory-word
IDIV = Integer divide (signed)
register-byte
register-word
memory-byte
memory-word
AAD = ASCII adjust for divide
CBW = Convert byte to word
CWD = Convert word to double-word
BIT MANIPULATION INSTRUCTIONS
NOT= Invert register/memory
AND = And
reg/memory and register to either
immediate to register/memory
immediate to accumulator
OR = Or
reg/memory and register to either
immediate to register/memory
immediate to accumulator
XOR = Exclusive or
reg/memory and register to either
immediate to register/memory
immediate to accumulator
NOTES:
1.
Clock cycles are given for 8-bit/16-bit operations.
2.
Clock cycles are given for jump not taken/jump taken.
3.
Clock cycles are given for interrupt taken/interrupt not taken.
4.
If TEST = 0
Shading indicates additions and enhancements to the 8086/8088 instruction set. See Appendix A, "80C186
Instruction Set Additions and Extensions," for details.
INSTRUCTION SET OPCODES AND CLOCK CYCLES
Format
1 1 0 1 0 1 0 0
0 0 0 0 1 0 1 0
1 1 1 1 0 1 1 w
mod 110 r/m
1 1 1 1 0 1 1 w
mod 111 r/m
1 1 0 1 0 1 0 1
0 0 0 0 1 0 1 0
1 0 0 1 1 0 0 0
1 0 0 1 1 0 0 1
1 1 1 1 0 1 1 w
mod 010 r/m
0 0 1 0 0 0 d w
mod reg r/m
1 0 0 0 0 0 0 w
mod 100 r/m
0 0 1 0 0 1 0 w
data
0 0 0 0 1 0 d w
mod reg r/m
1 0 0 0 0 0 0 w
mod 001 r/m
0 0 0 0 1 1 0 w
data
0 0 1 1 0 0 d w
mod reg r/m
1 0 0 0 0 0 0 w
mod 110 r/m
0 0 1 1 0 1 0 w
data
data
data if w=1
data if w=1
data
data if w=1
data if w=1
data
data if w=1
data if w=1
Clocks
Notes
19
29
38
35
44
29
38
35
44
15
2
4
3
3/10
4/16
3/4
(1)
3/10
4/10
3/4
(1)
3/10
4/10
3/4
(1)
D-5
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