Pcb Relocation Register - Intel 80C186XL User Manual

PERIPHERAL CONTROL BLOCK
Register Name:
Register Mnemonic:
Register Function:
15
E S
L
T
Bit
Mnemonic
ET Escape Trap
SL Slave/Master
MEM Memory I/O
R19:8 PCB Base
Address
Upper Bits
NOTE: Reserved register bits are shown with gray shading. Reserved bits must be written
to a logic zero to ensure compatibility with future Intel products.
4-2

PCB Relocation Register

RELREG
Relocates the PCB within memory or I/O space.
M R R R R
E 1 1
1 1
M 9 8 7 6
Reset
Bit Name
State
0 If ET is set, the CPU will trap when an ESC
instruction is executed.
0 If SL is set, the Interrupt Control Unit operates in
slave mode. If SL is clear, it operates in master
mode.
0 If MEM is set, the PCB is located in memory
space. If MEM is clear, the PCB is located in I/O
space.
0FFH R19:8 define the upper address bits of the PCB
base address. All lower bits are zero. R19:16 are
ignored when the PCB is mapped to I/O space.
Figure 4-1. PCB Relocation Register
R R R R R
1 1 1 1 1
5 4
3 2 1
Function
0
R R R
1 9 8
0
A1262-0A