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INTERRUPT CONTROL UNIT
8.5.1.1
Interrupt Vector Register
The Interrupt Vector Register is used only in Slave mode. In Master mode, the interrupt vector
types are fixed; in Slave mode they are programmable. The Interrupt Vector Register is used to
specify the five most-significant bits of the interrupt vector type. The three least-significant bits
are fixed (Table 8-5).
Table 8-4. Interrupt Control Unit Register Comparison
INT3 Control
INT2 Control
INT1 Control
INT0 Control
DMA1 Control
DMA0 Control
Timer Control
Interrupt Status
Interrupt Request
In-Service
Priority Mask
Interrupt Mask
Poll Status
Poll
EOI
(not used)
Table 8-5. Slave Mode Fixed Interrupt Type Bits
8-26
Master Mode
Slave Mode
Register Name
Register Name
(not used)
(not used)
Timer 2 Control
Timer 1 Control
DMA1 Control
DMA0 Control
Timer 0 Control
Interrupt Status
Interrupt Request
In-Service
Priority Mask
Interrupt Mask
(not used)
(not used)
EOI
Interrupt Vector
Interrupt Source
Timer 0
(reserved)
DMA 0
DMA 1
Timer 1
Timer 2
(reserved)
(reserved)
PCB Offset
Address
3EH
3CH
3AH
38H
36H
34H
32H
30H
2EH
2CH
2AH
28H
26H
24H
22H
20H
Type Bits
2
1
0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
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