Port K - Motorola DragonBall MC68328 User Manual

Parallel Ports
All 8 bits are implemented in the registers and all 8 are connected to the outside. As with
other ports, each bit can be individually configured, as needed. The programmer's model for
port J is shown below.
15 14 13 12
DIRECTION
DIR7 DIR6 DIR5 DIR4
Address: $FFFFF438
15 14 13 12
0 0 0 0
Address: $FFFFF43A
DIRECTION- DIR[7:0]
These bits control the pin directions. While high, the pins are outputs; while low, the pins
are inputs. These bits reset to 0 and have no function while the SELECT bits are low.
DATA- D[7:0]
These bits control or report the data on the pins while the associated SELECT bits are
high. While the DIRECTION bits are high, the DATA bits control the pins. While the DI-
RECTION bits are low, the value on the pins is reported. These bits reset to 0 while the
SELECT bits are low. The data bits may be written at any time. Bits that are configured
as inputs will accept the written data but it will not be accessible until the respective pins
are configured as outputs. The actual value on the pin is reported when these bits are
read.
SELECT- SEL[7:0]
These bits select whether chip-select or port I/O signals are connected to the pins. While
high, the port I/O function is connected to the pin; while low, the chip-select functions are
connected.

7.1.10 Port K

Port K is multiplexed with signals related to the serial peripheral interfaces and PCMCIA.
The signals are identified below.
7-12 MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
11 10 9
DIR3 DIR2 DIR1
Figure 7-20. Port J Data/Direction Register
11 10 9
UNUSED
0 0 0
Figure 7-21. Port J Select Register
8 7 6 5
DIR0 D7 D6 D5
8 7 6 5
0 SEL7 SEL6 SEL5
4 3 2 1
DATA
D4 D3 D2 D1
Reset Value: $0000
4 3 2 1
SELECT
SEL4 SEL3 SEL2 SEL1
Reset Value: $0000
MOTOROLA
0
D0
0
SEL0