Motorola DragonBall MC68328 User Manual page 34

Integrated processor
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2.3.2.3 INTERRUPT CONTROL REGISTER (ICR). This register controls the external-inter-
rupt inputs. It has polarity control and edge/level programmability.
15
14
13
12
ET1
ET2
ET3
ET6
Address: $(FF)FFF302
ET1
IRQ1 Edge Trigger Select
While this bit is set, the external IRQ1 bit is an edge-triggered interrupt. Users must clear
IRQ1 in the interrupt-status register to clear the interrupt; that is, writing a 1 to the IRQ1
bit in the interrupt-status register. While this bit is low, IRQ1 is a level-sensitive interrupt.
In this case, users must clear the source of the interrupt. On reset, this bit is cleared to 0
(level-sensitive interrupt).
0 = Level-sensitive interrupt
1 = Edge-sensitive interrupt
ET2
IRQ2 Edge Trigger Select
While this bit is set, the external IRQ2 bit is an edge-triggered interrupt. Users must clear
IRQ2 in the interrupt-status register to clear the interrupt. While this bit is low, IRQ2 is a
level-sensitive interrupt. In this case, users must clear the source of the interrupt. On re-
set, this bit is cleared to 0 (level-sensitive interrupt).
0 = Level-sensitive interrupt
1 = Edge-sensitive interrupt
ET3
IRQ3 Edge Trigger Select
While this bit is set, the external IRQ3 bit is an edge-triggered interrupt. Users must clear
IRQ3 in the interrupt-status register to clear the interrupt. While this bit is low, IRQ3 is a
level-sensitive interrupt. In this case, users must clear the source of the interrupt. On re-
set, this bit is cleared to 0 (level-sensitive interrupt).
0 = Level-sensitive interrupt
1 = Edge-sensitive interrupt
ET6
IRQ6 Edge Trigger Select
While this bit is set, the external IRQ6 bit is an edge-triggered interrupt. Users must clear
IRQ6 in the interrupt status register to clear the interrupt. While this bit is low, IRQ6 is a
level-sensitive interrupt. In this case, users must clear the source of the interrupt. On re-
set, this bit is clear to 0 (level-sensitive interrupt).
0 = Level-sensitive interrupt
1 = Edge-sensitive interrupt
POL1 Polarity Control for Interrupt 1
0 = Negative polarity
1 = Positive polarity
MOTOROLA
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
11
10
9
8
POL1
POL2
POL3
POL6
Figure 2-6. Interrupt Control Register
System Integration Module
7
6
5
4
UNUSED
3
2
1
0
Reset Value: 0000
2-9

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