Baud Control Register - Motorola DragonBall MC68328 User Manual

Integrated processor
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RX HALF ENABLE
While high, this bit enables an interrupt when the receiver FIFO is more than half full. This
bit resets to 0.
0 = RX HALF interrupt disabled
1 = RX HALF interrupt enabled
RX READY ENABLE
While high, this bit enables an interrupt when the receiver has at least one data byte in
the FIFO. While low, this interrupt is disabled.
0 = RX interrupt disabled
1 = RX interrupt enabled
TX EMPTY ENABLE
While high, this bit enables an interrupt when the transmitter FIFO is empty and needs
data. While low, this interrupt is disabled.
0 = TX EMPTY interrupt disabled
1 = TX EMPTY interrupt enabled
TX HALF ENABLE
While high, this bit enables an interrupt when the transmit FIFO is less than half full. While
this bit is low, the TX HALF interrupt is disabled. This bit resets to 0.
0 = TX HALF interrupt disabled
1 = TX HALF interrupt enabled
TX AVAIL ENABLE
While high, this bit enables an interrupt when the transmitter has a slot available in the
FIFO. While low, this interrupt is disabled. This bit resets to 0.
0 = TX AVAIL interrupt disabled
1 = TX AVAIL interrupt enabled

8.2.6 Baud Control Register

This register controls the operation of the baud-rate generator and the GPIO pin and resets
to $003F.
15
14
13
12
GPIO
GPIO
GPIO
GPIO
DELTA
DIR
SRC
ADDRESS: $(FF)FFF902
MOTOROLA
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
Transmitter Available For New Data
11
10
9
8
BAUD
DIVIDE
SRC
Figure 8-3. Baud Control Register
7
6
5
4
UNUSED
UART
3
2
1
0
PRESCALER
Reset Value: $003F
8-7

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