Cursor Width & Height Register (Cwch); Blink Control Register (Blkc); Lcd Panel Interface Registers; Panel Interface Configuration Register (Picf) - Motorola DragonBall MC68328 User Manual

Integrated processor
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4.7.3.3 CURSOR WIDTH & HEIGHT REGISTER (CWCH).
15
14
13
12
UNUSED
CW4
Address: $(FF)FFFA1C
CW4-CW0
Cursor width. This 5-bit group specifies the width of the hardware cursor in pixel count
(from 1 to 31).
CH4-CH0
Cursor height. This 5-bit group specifies the height of the hardware cursor in pixel count
(from 1 to 31).
The cursor is disabled if either CW or CH are set to zero.

4.7.3.4 BLINK CONTROL REGISTER (BLKC).

BKEN
Blink-enable cursor will remain on instead of blinking if this bit is cleared. Defaults to zero.
1 = Blink enable
0 = Blink disable
BD6-BD0
Blink divisor. The cursor will toggle once per specified number of internal frame pulses
plus one. The half-period may be as long as 2 seconds.

4.7.4 LCD Panel Interface Registers

4.7.4.1 PANEL INTERFACE CONFIGURATION REGISTER (PICF).

Figure 4-16. Panel Interface Configuration Register
PBSIZ1-PBSIZ0
LCD panel bus size.
00 = 1-bit
01 = 2-bit
10 = 4-bit
11 = unused
MOTOROLA
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
11
10
9
CW3
CW2
CW1
Figure 4-14. Cursor Width & Height Register
7
6
5
BKEN
BD6
BD5
Address: $(FF)FFFA1F
Figure 4-15. Blink Control Register
7
6
5
UNUSED
Address: $(FF)FFFA20
Panel Bus Width
8
7
6
5
CW0
UNUSED
NOTE
4
3
2
1
BD4
BD3
BD2
BD1
Reset Value: $7F
4
3
2
1
PBSIZ1 PBSIZ0
Reset Value: $00
LCD Controller
4
3
2
1
CH4
CH3
CH2
CH1
Reset Value: $0101
0
BD0
0
GS
0
CH0
4-15

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