Motorola DragonBall MC68328 User Manual page 37

System Integration Module
MINT4 (Mask External INT4, Bit 12)
This bit, while set, indicates that the external interrupt INT4 is masked. It is set to 1 after
reset.
0 = Enable INT4 interrupt
1 = Mask INT4 interrupt
MINT5 (Mask External INT5, Bit 13)
This bit, while set, indicates that the external interrupt INT5 is masked. It is set to 1 after
reset.
0 = Enable INT5 interrupt
1 = Mask INT5 interrupt
MINT6 (Mask External INT6, Bit 14)
This bit, while set, indicates that the external interrupt INT6 is masked. It is set to 1 after
reset.
0 = Enable INT6 interrupt
1 = Mask INT6 interrupt
MINT7 (Mask External INT7, Bit 15)
This bit, while set, indicates that the external interrupt INT7 is masked. It is set to 1 after
reset.
0 = Enable INT7 interrupt
1 = Mask INT7 interrupt
MIRQ1 (Mask IRQ1 Interrupt, Bit 16)
This bit, while set, indicates that the external IRQ level-1 interrupt is masked. It is set to 1
after reset.
0 = Enable IRQ1 interrupt
1 = Mask IRQ1 interrupt
MIRQ2 (Mask IRQ2 Interrupt, Bit 17)
This bit, while set, indicates that the external IRQ level-2 interrupt is masked. It is set to 1
after reset.
0 = Enable IRQ2 interrupt
1 = Mask IRQ2 interrupt
MIRQ3 (Mask IRQ3 Interrupt, Bit 18)
This bit, while set, indicates that the external IRQ level-3 interrupt is masked. It is set to 1
after reset.
0 = Enable IRQ3 interrupt
1 = Mask IRQ3 interrupt
2-12 MC68328 DRAGONBALL PROCESSOR USER'S MANUAL MOTOROLA