Port C - Motorola DragonBall MC68328 User Manual

Integrated processor
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15
14
13
0
0
0
Address: $FFFFF40A
DIRECTION- DIR[7:0]
These bits control the pin directions. While high, the pins are outputs; while low, the pins
are inputs. These bits reset to 0 and have no function while the SELECT bits are low.
DATA- D[7:0]
These bits control or report the data on the pins while the associated SELECT bits are high.
While the DIRECTION bits are high (output), D[7:0] controls the data to the pins. While the
DIRECTION bits are low (input), D[7:0] reports the signal level on the pins. The data bits
may be written at any time. Bits that are configured as inputs will accept the data, but the
written data will not be accessible until their respective pins are configured as outputs. The
actual value on the pin is reported when these bits are read regardless of whether they are
configured as input or output. These bits reset to 0 while the SELECT bits are low.
SELECT- SEL[7:0]
These bits select whether CPU data-bus low byte or I/O port signals are connected to the
pins. While high, the port I/O function is connected to the pin. While low, the D7-D0 func-
tions are connected.

7.1.4 Port C

Port C is multiplexed with various 68000 bus-control signals that are identified below.
All 8 bits are implemented in the registers, but only 6 bits connect to the outside. As with other
ports, each bit can be individually configured. Bit 0 can be used only when the on-chip PLL
is selected because the MOCLK function is needed to disable the PLL. The on-chip PLL will
be selected when this bit serves as a port I/O. The programmer's model for port C follows.
15
14
13
DIR7
DIR6
DIR5
DIR4
Address: $FFFFF410
MOTOROLA
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
12
11
10
9
UNUSED
0
0
0
0
Figure 7-7. Port B Select Register
Table 7-1. Port C Bit Functions
Bit
0
1
2
3
4
5
6
7
12
11
10
9
DIRECTION
DIR3
DIR2
DIR1
Figure 7-8. Port C Data/Direction Register
8
7
6
5
0
SEL7
SEL6
SEL5
Port Function Other Function
Bit 0
MOCLK
UDS
Bit 1
LDS
Bit 2
none
none
Bit 4
NMI
Bit 5
DTACK
Bit 6
WE (PCMCIA)
none
none
8
7
6
5
DIR0
D7
D6
D5
Parallel Ports
4
3
2
1
SELECT
SEL4
SEL3
SEL2
SEL1
Reset Value: $0000
4
3
2
1
DATA
D4
D3
D2
D1
Reset Value: $0000
0
SEL0
0
D0
7-5

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