Motorola DragonBall MC68328 User Manual page 121

SPI-Slave
POL
This bit controls the polarity of the SPSCLK.
0 = The inactive state value of the clock is low (idle = 0)
1 = The inactive state value of the clock is high (idle = 1)
SPISEN
This status bit enables the slave SPI module.
1 = SPIS module enabled
0 = SPIS module disabled (default)
DATA
These are the data bits shifted from the external device. At every 8th SPSCLK edge, data
from the peripheral is loaded into this buffered register. If the data buffer is not accessed
before the next byte is received, it will be overwritten and the OVRWR bit will be set, post-
ing an interrupt.
9-4 MC68328 DRAGONBALL PROCESSOR USER'S MANUAL MOTOROLA