General Purpose Timer; Counter Register; Timer Control Registers - Motorola DragonBall MC68328 User Manual

Integrated processor
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Timer

6.4.1 General Purpose Timer

This section describes the timer registers.
6.4.1.1 COUNTER REGISTER. The counter register is a 16-bit read-only register that can
be read at anytime without disturbing the current count.
15
14
13
12
Timer 1 Address: $(FF)FFF608 or
Timer 2 Address: (FF)FFF614
COUNT
This is the current count value.
6.4.1.2 TIMER CONTROL REGISTERS. These identical registers control the overall indi-
vidual timer operation.
15
14
13
12
UNUSED
Timer 1 Address: (FF)FFF600
Timer 2 Address: (FF)FFF60C
CAPTURE EDGE
These bits control the operation of the capture function. The bits are encoded as:
00 = Disable interrupt on capture event
01 = Capture on rising edge and generate interrupt on capture
10 = Capture on falling edge and generate interrupt on capture
11 = Capture on rising or falling edges and generate interrupt on capture
OM
Output Mode
This bit controls the output mode of the timer after a reference-compare event.
0 = Active-low pulse for one SYSCLK period
1 = Toggle output
IRQEN
Reference Event Interrupt-Enable
This bit controls the generation of an interrupt on a reference-compare event.
0 = Disable interrupt on reference event
1 = Enable interrupt on reference event
6-4
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
11
10
9
8
Figure 6-3. Timer Counter Register
11
10
9
8
FRR
Figure 6-4. Timer Control Registers
7
6
5
4
7
6
5
4
CAPTURE EDGE
OM
IRQEN
3
2
1
0
Reset Value: $0000
3
2
1
0
CLKSOURCE
TEN
Reset Value: $0000
MOTOROLA

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