Serial Peripheral Interface- Master (Spim); Overview; Operation; Operation Within Spim Module - Motorola DragonBall MC68328 User Manual

SECTION 10
SERIAL PERIPHERAL INTERFACE— MASTER (SPIM)
The serial peripheral interface (SPI) is a high-speed synchronous serial port for communi-
cating to external devices such as A/D converters and nonvolatile RAMs. The interface is a
3- or 4-wire system, depending on unidirectional or bidirectional communication mode. The
SPIM provides the clock for data transfer and can only function as a master device. It is
upward-compatible with SPIs that are popular on Motorola's 6805 microcomputer chips.

10.1 OVERVIEW

The SPIM transfers data between the MC68328 processor and peripheral devices in bursts
over a serial link. Enable and clock signals control the exchange data between the two
devices. If the external device is a talk-only device, the SPIM output port can be ignored and
used for other purposes. Figure 10-1 is a block diagram of the SPIM.

10.2 OPERATION

10.2.1 Operation within SPIM module

To perform a serial data transfer, follow the sequence below:
• Set
—Data rate bits 15—13
—SPMEN (enable) bit 9
—IRQEN (interrupt enable) bit 6
—PHA (phase control) bit 5
—POL (polarity control) bit 4
—BIT count (data burst length) bits 3—0
• Load data
• Set XCH bit 8
MOTOROLA
MPU INTERFACE
CLOK
GEN
SHIFT REGISTER
MSB
Figure 10-1. SPIM Block Diagram
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
CONTROL
SPMCLK
SPMRXD
SPMTXD
10-1