Motorola DragonBall MC68328 User Manual page 87

Timer
This register consists of 4 control or status bits. Upon reset, the watchdog timer is disabled.
All bits are cleared. The LOCK bit will set if and only if the watchdog timer is activated. Once
the bit is set, it will be cleared only by a software reset or external reset.
WDEN
This bit enables the watchdog timer. While this bit is low, the watchdog is disabled.
0 = Watchdog disabled
1 = Watchdog enabled
FI
This bit indicates that the interrupt should be generated instead of a software reset.
0 = Software reset mode, the watchdog interrupt is disabled
1 = Forced watchdog interrupt instead of software reset
LOCK
This bit is not user programmable. It is set when the watchdog timer is activated.
0 = Watchdog timer is not locked
1 = Watchdog timer is locked; disable writing to WDEN bit
W/DRST
This bit indicates software reset status.
0 = Not reset
1 = Set when software reset is activated.
This bit can be cleared only by writing a 0 to the bit in the control register.
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