Motorola DragonBall MC68328 User Manual page 89

Parallel Ports
negated and the "Data from module" signal is not used (0). The "Data to module" signal is
connected to the master SPI RXD input.
While the SELECT bit is clear (default), the module pin function is enabled. Port K, bit 0 is
the master SPI TXD signal. The master SPI module controls the direction of data flow
(always output). While the SELECT bit is set (if the DIRECTION bit is 1 [direction = output]),
data written to the DATA register is presented to the pin. If DIRECTION is 0 (input), data
present on the pin is sampled and presented to the CPU when a read cycle is executed.
While the DIRECTION is output, the actual pin level is presented during read accesses. This
may not be the same as the data that was written if the pin is overdriven. To prevent glitches
during a mode change from unselected to selected, the intended data should be written to
the DATA register before going to the selected mode.
A Programming Example for Port K:
Assume the slave SPI is to be enabled, the master SPI and the PCMCIA are not used.
The pins associated with the unused modules will serve as I/Os. Port K bits 2-0 will be
inputs and Port K bits 7-6 will be outputs.
Value in port K SELECT register:
$C7
Value in port K DIRECTION register:
$C0
Value in port K DATA register:
bits 7-6 are written with the value to be output on port K, bits 7-6
bits 5-3, when read contain the current value on the slave SPI pins
bits 2-0 contain current value on port K, bits 2-0
Bits that are in the module mode (SELECT = 0) can be read and written. While
bits are configured as outputs, data that is written can be read back. Bits configured
as inputs can be written but the current pin value is read back. In either case, writ-
ing to bits has no effect on the pins.
7.1.1.2 PULLUP PORT. Port M is a pullup port that operates like a basic port, but adds a
switchable pullup resistor to the pin. Figure 7.2 illustrates its operation. Users enable the pul-
lup resistor by writing bits in the PULLUP register to 1. The pullup resistors can be individu-
ally selected and operate whether the I/O port is selected or deselected. Refer to the section
describing port M for more details.
7.1.1.3 INTERRUPT PORT. Port D is an interrupt port that has all of the basic and pullup-
port capabilities with the addition of interrupt capabilities. Figure 7-3 illustrates the operation
of the interrupt port. Port D does not have module signals associated with its signals; it is
intended as a general-purpose, interrupt-generating port or a keyboard-input port.
7-2 MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
bits 7-6 in I/O mode (1's)
bits 5-3 in slave SPI mode (0's)
bits 2-0 in I/O mode (1's)
bits 7-6 outputs (1's)
bits 5-3 are inputs (0's) *see Note below
bits 2-0 inputs (0's)
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