Port F - Motorola DragonBall MC68328 User Manual

Integrated processor
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puts. Note that the actual value on the pin is reported when these bits are read regardless
of whether they are configured as input or output. These bits reset to 0.
PULLUP - PU[7:0]
These bits enable the pullup resistors on the port. While high, the pullup resistors are en-
abled; while low, they are disabled. Port E, bit 7 pullup resistor is enabled after reset.
SELECT- SEL[7:0]
These bits select whether CSA1B-CSB3B or I/O port signals are connected to the pins.
While high, the port I/O functions are connected to the pin; while low, the chip-select func-
tion is connected.

7.1.7 Port F

Port F is multiplexed with address lines A23-A31. Unused address pins can serve as parallel
I/Os on a bit-by-bit basis. The programmer's model for port F is shown below.
15
14
13
12
DIRECTION
DIR7
DIR6
DIR5
DIR4
Address: $FFFFF428
15
14
13
12
PU7
PU6
PU5
PU4
Address: $FFFFF42A
DIRECTION- DIR[7:0]
These bits control the pin directions. While high, the pins are outputs; while low, the pins
are inputs. These bits reset to 0 and have no function while the select bits are low.
DATA- D[7:0]
These bits control or report the data on the pins while the associated SELECT bits are
high. While the DIRECTION bits are high, D[7:0] controls the data to the pins. While the
DIRECTION bits are low, D[7:0] reports the signal driving the pins. These bits reset to 0
while the SELECT bits are low. The data bits may be written at any time. Bits that are con-
figured as inputs will accept the written data but it will not be accessible until the respective
MOTOROLA
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
11
10
9
DIR3
DIR2
DIR1
Figure 7-16. Port F Data/Direction Register
11
10
9
PULLUP
PU3
PU2
PU1
Figure 7-17. Port F Select Register
8
7
6
5
DIR0
D7
D6
D5
8
7
6
5
PU0
SEL7
SEL6
SEL5
Parallel Ports
4
3
2
1
DATA
D4
D3
D2
D1
Reset Value: $0000
4
3
2
1
SELECT
SEL4
SEL3
SEL2
SEL1
Reset Value: $FFFF
0
D0
0
SEL0
7-9

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